The present invention generally relates to software program and hardware for electronic design automation (EDA), and more particularly, to EDA tools for emulating logic circuits.
As the semiconductor manufacturing technology advances, great deals of efforts have been made on the integration of several functional blocks in single chip.
Since today""s semiconductor technology allows the system designer to integrate millions of transistors in single chip, it is crucial to design and verify electronic circuits prior to the manufacture of the prototype chip.
Thus, to verify the correctness of the circuit netlist file prior to the manufacturing, an approach known as circuit emulation is sometimes used in conjunction with EDA simulation tools.
Emulation aims to reduce or eliminate delays and costs associated with redesigning and re-manufacturing nonfunctional circuit prototypes.
Presently, various re-configurable logic devices such as field programmable gate arrays (FPGAs) are widely used for the emulation of a circuit design in conjunction with EDA tools, which enable automatic downloading of netlists.
The details of prior art circuit emulating systems are described in U.S. Pat. Nos. 5,884,066, 5,841,967, and 5,329,470.
The prior art, however, has a limitation because the conventional emulation system includes only the target FPGA where the netlists are downloaded for the configuration of the circuit design.
In addition, the prior art has further a limitation since it is inevitable to replace the whole motherboard when the current FPGA is to be upgraded in accordance with the prior art. In other words, since the signal pins on the FPGA are connected to the conducting lines on the motherboard through the dedicated pin locations on the socket, it is inevitable to replace the whole motherboard if the upgraded FPGA has a different type of pin connections.
Furthermore, the prior art has a limitation because the socket for connecting the FPGA to the motherboard becomes too expensive if the number of pins exceeds a certain number.
The soldering technology of the prior art, however, is not still recommendable because it is difficult to replace the emulation circuit board with the upgraded FPGA without damaging the motherboard.
Accordingly, it is an object of the present invention to provide a method and system for emulating a variety of circuit designs.
It is still another object of the present to provide a method and system for configuring the emulation FPGAs by downloading both the netlists and the microcomputer program simultaneously through a computer interface.
Yet it is another object of the present invention to provide a method and system for configuring the emulation FPGAs of which the control signals, the stimulus, and the microcomputer control signals are generated from the computer.
It is further an object of the present invention to provide a method and system to monitor the operation of the configured FPGAs on the computer. It is still another object of the present invention to provide a method and system for configuring the emulation FPGAs with a variety of capacity and pin types on an emulation board.
The present invention has an advantage that it is a system that can be easily upgraded to more powerful FPGAs as they become available from vendors. This allows the emulation system to be upgraded in power without changing the system""s basic motherboard.
Additionally, the present invention involves a system that allows for the use of different types of FPGAs. According to the present invention, the control FPGA is configurable so as to control the microcomputer and the target FPGA.
Since the control FPGA is connected through the emulation bus on the motherboard, the target FPGAs on the option card can be upgraded or switched to different types of FPGAs without affecting the motherboard emulation bus pin locations.
The configuration data can be loaded into the target FPGAs through the control FPGAs. Furthermore, the state of the nodes in the emulation FPGAs can be monitored on the computer screen through the control FPGAs.